| 000 | 01723mm a2200481a 44500 | ||
|---|---|---|---|
| 001 | NM002815 | ||
| 003 | AR-HaUTN | ||
| 005 | 20240912182158.0 | ||
| 007 | ta | ||
| 008 | 32020s2010 ||||||||||||||000 | se | | ||
| 020 | _a978-0-262-01433-5 | ||
| 040 |
_aAR-HaUTN _cAR-HaUTN |
||
| 080 | _a004.31=111 PED | ||
| 100 |
_aPedroni, Volnei A. _92810 |
||
| 245 |
_aCircuit design and simulation with VHDL _cVolnei A. Pedroni |
||
| 250 | _a2ª ed. | ||
| 260 |
_aLondon _bMassachusetts Institute of Technology _cc. 2010 |
||
| 300 |
_a608 p. _bil.,gráficos. |
||
| 500 | _aLa obra está organizada en tres partes: 1) Circuit-level VHDL; 2) System-level VHDL; 3) Extended and advaced designs | ||
| 500 | _aApéndices, bibliografía e índice alfabético p. 493-608 | ||
| 505 | _u<a href="https://biblio-intra.frh.utn.edu.ar/opac-tmpl/bootstrap/indices/2815.pdf" target="_blank">Indice Alfabético </a> | ||
| 505 | _tCode structure | ||
| 505 | _tData types | ||
| 505 | _tOperators and attributes | ||
| 505 | _tConcurrent code | ||
| 505 | _tSequential code | ||
| 505 | _tSIGNAL and VARIABLE | ||
| 505 | _tSYSTEM-LEVEL VHDL | ||
| 505 | _tPACKAGE and COMPONENT | ||
| 505 | _tFUNCTION and PROCEDURE | ||
| 505 | _tSimulation with VHDL testbenches | ||
| 505 | _tVHDL design of state machines | ||
| 505 | _tVHDL design with basic displays | ||
| 505 | _tVHDL design of memory circuits | ||
| 505 | _tVHDL design of serial communications circuits | ||
| 505 | _tVHDL design of VGA video interfaces | ||
| 505 | _tVHDL design of DVI video interfaces | ||
| 505 | _tVHDL design of FPD-link video interfaces | ||
| 653 | _aINGENIERIA ELECTRONICA | ||
| 653 | _aCIRCUITOS | ||
| 653 | _aVHDL | ||
| 942 |
_cBK _2udc |
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| 999 |
_c2815 _d2815 |
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